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Cadence Support Site:

Cal Poly is a member of the Cadence University Program since October of 2010. The software has been operable since February 2012. Hardware was expanded to improve Cadence performance in October 2012.

We use Cadence Design Systems, Inc. products in EE431 (CAD of VLSI) as well as in senior projects, Masters projects, and faculty research. 

In our young program, we use and have used Cadence* products in research projects including:

  • Blood glucose sensing circuit 
  • Low power clock distribution 
  • UWB transceiver

Responsible Faculty and Support:

The faculty member responsible for this web page and Cadence software support is Dr. Tina Smilkstein. Professors participating in evolving Cal Poly's IC design track include Dr. John Oliver and Dr. Vladimir Prodanov. Network technician Corey Ricketts maintains the hardware and is in charge of keeping the Cadence labs running smoothly.

Links:

Tutorials (Under construction)

System setup documentation (Under construction)

Example circuits (Under construction)

References (Under construction)

*Cadence is a registered trademark of Cadence Design Systems, Inc., 2655 Seely Avenue, San Jose, CA, 95134.

(Page last modified: 1/28/2013)